Hardware Support to Reduce Overhead in Fine - Grain M edia Codes

The growing importance of media and media-like codes ha s caused general-purpose processors too incorporate SIMD-like extensions, such as MMX, SSE, and Alt iVec. While these media extensions do improve performance , significant parallelism in these codes remains u nexploited. In this paper, we propose and evaluate a programmable loopp engine (PLE for short) that executes media codes and kernels efficiently by movingg most of the overhead associated with the media programs intoo hardwar e. We study a range of media codes to determine which features and characteristics of these programs are sufficiently frequent to merit implementation in hardware. The commonn classes of operations that we find are multiple nestedd loopp control ,address generation, dataa transformations, and streamingg memory operations. We quantify the fraction of instructions that can be e limi-nated for our benchmarks, showing that it is over 65% on ave rage. We evaluate a design of one PLE, showingg how it can be integrated cleanly with a general-purpose pi peline, defining an instruction set interface, and quantifying its area and power overhead with a VHDL implementation. We find that the PLE requires a mere 10% of the area required by the MMX and SSE extensions. Further more, the PLE improves performance of a set of media kernels, over that of a 4-way SIMD processor, by more t han 7X on average, and accelerates a set of five media applications by an average of 54%. For all kernels andd 33 of 55 applications, a 4-wayy processor with the PLE out-performs an 8-wayy SIMD processor without the PLE. For al l the kernels and 22 of the 55 applications, a 4-wayy processor enhanced with the PLE outperforms even a 16-way processor.